Workshops

SC17 OpenSuCo 2017

2017 Workshop on Open Source Supercomputing

OpenSuCo 2017

Sunday, November 12, 2017 – 09:00 to 17:30 MST

Held in conjunction with the The International Conference for High Performance Computing, Networking, Storage and Analysis (SC17), Denver, Colorado

Increased specialization is an effective way for the HPC to continue performance scaling at the end of MOSFET scaling. To decrease design cost – in both money and time, rapid hardware prototyping methods combined with flexible software stacks and programming models must to be explored.

Open source solutions may provide the best opportunities for specialization and the OpenSuCo Workshop seeks to encapsulate a wealth of effort in design, prototyping, and cross-functional collaboration of open source hardware, software, and scientific computing projects in a singular point of technical discussion and exchange. As the limits of MOSFET/Dennard scaling grow ever closer, the high performance/technical computing community continually seeks new methods by which to continue scaling system performance and, potentially, system efficiency. The goal of this workshop is to engage the HPC community and explore open-source solutions for constructing an HPC system – from silicon to applications.

Topics of Interest

We invite the community to submit both papers and proposals for “lightning demos.” The demo session will provide attendees the opportunity to give short (5-min) demos of software or hardware technology that could forward the construction of open source HPC systems.

We solicit papers according to (but not limited to) three technical tracks as follows:

Hardware Software Collaboration Lightning Demo
  • ISA & processors
  • System and network interconnects
  • Simulation & emulation
  • Early hardware evaluations
  • System software & OS
  • Programming models, tools & tool chains
  • Numerical solvers
  • Application infrastructures
  • Co-design projects and methods
  • Cross-disciplinary projects
  • International collaborations
  • Prototype hardware (FPGA or ASIC) demonstrations
  • Application demonstrations
  • Live benchmarking or performance analysis demos
Program Committee

Anastasiia Butko, Lawrence Berkeley National Laboratory
Sunita Chandrasekaran, University of Delaware
David Donofrio, Lawrence Berkeley National Laboratory
Glen Edwards, Micron Technology, Inc.
Farzad Fatollahi-Fard, Lawrence Berkeley National Laboratory
John Leidel, Texas Tech University / Tactical Computing Labs
Eric Van Hensbergen, ARM
Rick O’Conner, RISC-V Foundation
Maarten de Vries, Bull
Noel Wheeler, Laboratory of Physical Science
Sam Williams, Lawrence Berkeley National Laboratory

Agenda

PDF

Paper Presentations
09:00-09:30 — Opening Talk | OpenSuCo Organizers
09:30-10:00 — Combining Emulation and Simulation to Evaluate a Near Memory Key/Value Lookup | Joshua Landgraf, G. Scott Lloyd & Maya Gokhale (LLNL)

10:00-10:30 — Coffee Break

10:30-11:00 — HPX – A open source lib for Parallelism and Concurrency | Thomas Heller (Friedrich-Alexander University), Patrick Diehl (Polytechnique Montreal), Zach Byerly (LSU), John Biddiscombe (Swiss Supercomputing Centre) & Hartmut Kaiser (LSU)
11:00-11:30 — An Introspective Approach to Architecting Hardware using C++ | Char Kersey & Sudhakar Yalamanchili (Georgia Tech)
11:30-12:00 — Toward Common Components for Open Workflow Systems | Jay Billings (ORNL/University of Tennessee) & Shantenu Jha (BNL/Rutgers)

12:00-13:30 — Lunch

13:30-14:30 — Keynote Speaker: Andreas Olofsson (DARPA)

14:30-15:00 — Sandia SST | Simon Hammond (Sandia)

15:00-15:30 — Coffee Break

Lightning Demos
15:30-15:45 — Chapel: Open-Source Productive Parallel Programming at Scale | Ben Albrecht & Brad Chamberlain (Cray)
15:45-16:00 — Convolutional Neural Networks FPGA Accelerator | Andre Xian Ming Chang, Aliasger Zaidy, Abhishek Chaurasia & Eugenio Culurciello (FWDNXT)
16:00-16:15 — OpenSMART: An Opensource Single-cycle Multi-hop NoC Generator | Hyoukjun Kwon & Tushar Krishna (Georgia Tech)
16:15-16:30 — LiME: An Open Source Memory System Emulation Platform | Abhishek Jain, Scott Lloyd & Maya Gokhale (LLNL)
16:30-16:45 — Accelerating Image Recognition Processing Using Tiered Storage and Spark | Isom Crawford & David Chen (IBM)
16:45-17:00 — OpenSoC System Architect: Toward An Integrated RISC-V SoC Design Infrastructure | John Leidel (Tactical Computing Laboratories), Farzad Fatollahi-Fard & David Donofrio (LBNL)

Submission Information
  • Submission Deadline: 2017 September 15, 23:59 AOE 2017 September 29, 23:59 AOE (EXTENDED)
  • Author Notification: 2017 October 06
  • Camera-ready deadline: 2017 October 13

Papers need to be formatted according to the 2017 ACM Master Article Template. Papers are limited to 10 pages including figures, references, the abstract, and everything else.

Lightening demo submissions must also be formatted according to the same 2017 ACM Master Article Template. Lightening demo submissions are limited to 1 page, NOT including figures and references.


Submit your papers via EasyChair.
Submit Here!